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    <title>topic PA-2050 - what are the aho_sw_fpga_unavailable and dfa_sw_fpga_not_loaded counters all about? in General Topics</title>
    <link>https://live.paloaltonetworks.com/t5/general-topics/pa-2050-what-are-the-aho-sw-fpga-unavailable-and-dfa-sw-fpga-not/m-p/1720#M1275</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to find out what the following two counters are all about and if our rate/count for these counters are anything to worry about regarding Data plane performance issues with our PA2050 Active-Active platform.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE id="stats-counters" style="font-family: 'Yanone Kaffeesatz', 'Open Sans Condensed Light', 'Trebuchet MS', sans-serif;"&gt;&lt;/TABLE&gt;&lt;TABLE id="stats-counters" style="font-family: 'Yanone Kaffeesatz', 'Open Sans Condensed Light', 'Trebuchet MS', sans-serif;"&gt;&lt;/TABLE&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="width: 537px;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD class="xl22" height="17" width="166"&gt;Name&lt;/TD&gt;&lt;TD class="xl22" width="73"&gt;Category&lt;/TD&gt;&lt;TD class="xl22" width="72"&gt;Severity&lt;/TD&gt;&lt;TD class="xl22" width="71"&gt;Aspect&lt;/TD&gt;&lt;TD class="xl22" width="78"&gt;Value&lt;/TD&gt;&lt;TD class="xl22" width="77"&gt;Rate&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD class="xl23" height="17"&gt;aho_sw_fpga_unavailable&lt;/TD&gt;&lt;TD class="xl23"&gt;aho&lt;/TD&gt;&lt;TD class="xl23"&gt;warn&lt;/TD&gt;&lt;TD class="xl23"&gt;pktproc&lt;/TD&gt;&lt;TD class="xl23"&gt;29184581&lt;/TD&gt;&lt;TD class="xl23"&gt;949&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD class="xl23" height="17"&gt;dfa_sw_fpga_not_loaded&lt;/TD&gt;&lt;TD class="xl23"&gt;dfa&lt;/TD&gt;&lt;TD class="xl23"&gt;warn&lt;/TD&gt;&lt;TD class="xl23"&gt;offload&lt;/TD&gt;&lt;TD class="xl23"&gt;18083540&lt;/TD&gt;&lt;TD class="xl23"&gt;542&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any info would be greatly appreciated.&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 24 Jul 2013 10:33:51 GMT</pubDate>
    <dc:creator>Smi12</dc:creator>
    <dc:date>2013-07-24T10:33:51Z</dc:date>
    <item>
      <title>PA-2050 - what are the aho_sw_fpga_unavailable and dfa_sw_fpga_not_loaded counters all about?</title>
      <link>https://live.paloaltonetworks.com/t5/general-topics/pa-2050-what-are-the-aho-sw-fpga-unavailable-and-dfa-sw-fpga-not/m-p/1720#M1275</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm trying to find out what the following two counters are all about and if our rate/count for these counters are anything to worry about regarding Data plane performance issues with our PA2050 Active-Active platform.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;TABLE id="stats-counters" style="font-family: 'Yanone Kaffeesatz', 'Open Sans Condensed Light', 'Trebuchet MS', sans-serif;"&gt;&lt;/TABLE&gt;&lt;TABLE id="stats-counters" style="font-family: 'Yanone Kaffeesatz', 'Open Sans Condensed Light', 'Trebuchet MS', sans-serif;"&gt;&lt;/TABLE&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="width: 537px;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD class="xl22" height="17" width="166"&gt;Name&lt;/TD&gt;&lt;TD class="xl22" width="73"&gt;Category&lt;/TD&gt;&lt;TD class="xl22" width="72"&gt;Severity&lt;/TD&gt;&lt;TD class="xl22" width="71"&gt;Aspect&lt;/TD&gt;&lt;TD class="xl22" width="78"&gt;Value&lt;/TD&gt;&lt;TD class="xl22" width="77"&gt;Rate&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD class="xl23" height="17"&gt;aho_sw_fpga_unavailable&lt;/TD&gt;&lt;TD class="xl23"&gt;aho&lt;/TD&gt;&lt;TD class="xl23"&gt;warn&lt;/TD&gt;&lt;TD class="xl23"&gt;pktproc&lt;/TD&gt;&lt;TD class="xl23"&gt;29184581&lt;/TD&gt;&lt;TD class="xl23"&gt;949&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD class="xl23" height="17"&gt;dfa_sw_fpga_not_loaded&lt;/TD&gt;&lt;TD class="xl23"&gt;dfa&lt;/TD&gt;&lt;TD class="xl23"&gt;warn&lt;/TD&gt;&lt;TD class="xl23"&gt;offload&lt;/TD&gt;&lt;TD class="xl23"&gt;18083540&lt;/TD&gt;&lt;TD class="xl23"&gt;542&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any info would be greatly appreciated.&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Jul 2013 10:33:51 GMT</pubDate>
      <guid>https://live.paloaltonetworks.com/t5/general-topics/pa-2050-what-are-the-aho-sw-fpga-unavailable-and-dfa-sw-fpga-not/m-p/1720#M1275</guid>
      <dc:creator>Smi12</dc:creator>
      <dc:date>2013-07-24T10:33:51Z</dc:date>
    </item>
    <item>
      <title>Re: PA-2050 - what are the aho_sw_fpga_unavailable and dfa_sw_fpga_not_loaded counters all about?</title>
      <link>https://live.paloaltonetworks.com/t5/general-topics/pa-2050-what-are-the-aho-sw-fpga-unavailable-and-dfa-sw-fpga-not/m-p/1721#M1276</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Good Morning,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Lucida Grande', 'Helvetica Neue', Helvetica, Arial, sans-serif; font-size: 12px; background-color: #ffffff;"&gt;Warning level indicates a non-error event, in most cases no immediate action is required but it may be beneficial to monitor&lt;/SPAN&gt;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Lucida Grande', 'Helvetica Neue', Helvetica, Arial, sans-serif; font-size: 12px; background-color: #ffffff;"&gt;The AHO is used for threat signature pattern matching, and the DFA is used in App-ID signatures and decoder token matches.&amp;nbsp; If signatures are changed, we will mark the FPGA as unavailable, load the new signatures into the FPGA, then unmark it. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The &lt;SPAN style="color: #000000; font-family: Arial, Helvetica, sans-serif; font-size: 12px; background-color: #ffffff;"&gt;aho_sw_fpga_unavailable and the &lt;/SPAN&gt;&lt;SPAN style="font-family: 'Lucida Grande', 'Helvetica Neue', Helvetica, Arial, sans-serif; font-size: 12px; background-color: #ffffff;"&gt; &lt;/SPAN&gt;&lt;SPAN style="color: #000000; font-family: Arial, Helvetica, sans-serif; font-size: 12px; background-color: #ffffff;"&gt;dfa_sw_fpga_not_loaded&lt;/SPAN&gt;&lt;SPAN style="font-family: 'Lucida Grande', 'Helvetica Neue', Helvetica, Arial, sans-serif; font-size: 12px; background-color: #ffffff;"&gt; &lt;/SPAN&gt; counters are something that we shouldnt worry much about and they seen w&lt;SPAN style="font-family: 'Lucida Grande', 'Helvetica Neue', Helvetica, Arial, sans-serif; font-size: 12px; background-color: #ffffff;"&gt;hen signatures are updated,&amp;nbsp; and the PANFW marks the FPGAs as unavailable during the loading process. Once the new signatures have been loaded, the FPGA will be marked available again.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The best way to check if the dataplanes are being overloaded are by looking at the below commands,&lt;/P&gt;&lt;P&gt;&amp;gt;show running resource-monitor &lt;/P&gt;&lt;P&gt;&amp;gt;show session info&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Where the first command gives a snapshot of the percentage of CPU being used per DP, during a particular time.&lt;/P&gt;&lt;P&gt;The second command shows the total number of sessions active and throughput at that time.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Karthik RP&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Jul 2013 13:00:31 GMT</pubDate>
      <guid>https://live.paloaltonetworks.com/t5/general-topics/pa-2050-what-are-the-aho-sw-fpga-unavailable-and-dfa-sw-fpga-not/m-p/1721#M1276</guid>
      <dc:creator>kprakash</dc:creator>
      <dc:date>2013-07-24T13:00:31Z</dc:date>
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