topic Re: PBR IN HARDWARE? in General Topics

PBR IN HARDWARE?

alle — Mon, 16 Apr 2012 13:40:53 GMT

Hello!

just a little question on PBR!

PA4020 support PBR in HARDWARE? Which Limitation For PBR?

thks,

ALLE

Re: PBR IN HARDWARE?

rmonvon — Mon, 16 Apr 2012 18:54:48 GMT

By PBR, do you mean to say PBF = Policy Based Forwarding?

There's no specific limitation on PBF itself and the limitation is really system limitation such as capacity. Thanks.

Re: PBR IN HARDWARE?

mikand — Tue, 17 Apr 2012 20:36:33 GMT

Which means that PBF/PBR is never done by the system cpu not even on PA-200?

Compared to SSL-termination which is performed by the system cpu up to (including) PA-2xxx if im not misinformed, while PA-4xxx did this in the dataplane and PA-5xxx have an updated design to perform even more SSL-termination than the 4xxx series.

I think this question can have to do with that on Cisco its not uncommon that when one use PBR all packets will get punted to the system cpu instead of just using the asic (aka "dataplane") unless you use C6500 and upwards depending on supervisor etc.

Re: PBR IN HARDWARE?

rmonvon — Tue, 17 Apr 2012 20:50:08 GMT

Hi...My response was directed at the question for the PA4020. Thanks.

Re: PBR IN HARDWARE?

mikand — Tue, 17 Apr 2012 20:55:58 GMT

So what about the other models?

Do there perhaps exist a feature matrix/table which explains what is done in dataplane vs whats done in mgmtplane for various models?

Re: PBR IN HARDWARE?

rmonvon — Tue, 17 Apr 2012 21:11:38 GMT

The dataplane is used for processing of the production traffic, while the mgmt plane is for administrative purpose only. PBF, SSL decryption, appID, content inspection, etc are done on the dataplane. For simplification, most of the settings (syslog, SNMP, logging, reporting, etc) under the Device tab are handled by the mgmt plane.

Thanks.

Re: PBR IN HARDWARE?

mikand — Tue, 17 Apr 2012 21:15:10 GMT

Im pretty sure the system cpu is involved regarding ssl decryption for PA-2xxx and lower models (perhaps not once the SSL is setup but during the "generate fake cert to send to the client" phase) thats why I asked regarding other features aswell.

Re: PBR IN HARDWARE?

rmonvon — Tue, 17 Apr 2012 22:47:46 GMT

You're correct, the cpu is involved. However, we have dedicated cpu/processors for the dataplane and dedicated cpu/processors for the mgmt plane. They are separate and do not share their resource across the two planes. As such, the ssl decryption would involve the dataplane's cpu/processors only.

Re: PBR IN HARDWARE?

alle — Wed, 18 Apr 2012 08:41:17 GMT

hello,

exactly Mikand. I want to know if the PBF is Asic-based or CPU-based?

Because the CPU can have an signifactly impact on System performance.

But When I see the others responses I think that the CPU of DATAPLANE is involved when I use PBF,

thks,

ALEX

Re: PBR IN HARDWARE?

mikand — Wed, 18 Apr 2012 09:48:11 GMT

The "cpu" of dataplane is the asic/fpga (depending on model).

While the system cpu is what PA calls mgmtplane or controlplane.

Re: PBR IN HARDWARE?

alle — Thu, 10 May 2012 14:36:50 GMT

OK FOR ME PBF USE CPU