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    <title>topic Query regarding the default state of FPGA on PA-3060: What's the output of the command &amp;quot;debug dataplane fpga state&amp;quot; running on PAN-OS 9.1.7 or above? in General Topics</title>
    <link>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/417485#M93557</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Dear Community Members,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I hope someone will be able to help me out to confirm the default FPGA states on the PA-3060 appliance and supply some additional info on this matter?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;As per the knowledgebase article (&lt;A href="https://knowledgebase.paloaltonetworks.com/KCSArticleDetail?id=kA10g000000PLsRCAW" target="_self"&gt;CAN THE CONTENT INSPECTION PERFORM ONLY IN SOFTWARE OR HARDWARE ON PA-3000 SERIES FIREWALLS?)&amp;nbsp;&lt;/A&gt;I see that the used algorithms are:&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;STRONG&gt;AHO&lt;/STRONG&gt; - &lt;U&gt;Hardware (Offloaded)&lt;/U&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;STRONG&gt;DFA&lt;/STRONG&gt; - &lt;U&gt;Software&lt;/U&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;*&lt;STRONG&gt;PSCAN&lt;/STRONG&gt; - &lt;U&gt;Software&lt;/U&gt;, and it will be replacing AHO (but I could not find any info in regards to when it should happen)&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;Unfortunately, I do not have the needed hardware to execute the command and check it by myself. &lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;And I would like to verify what (on default on PA-3050/3060) the output of the command "&lt;STRONG&gt;debug dataplane fpga state&lt;/STRONG&gt;" running the PAN-OS 9.1.7 or above is?&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;I'm also interested to find some more info about the change of algorithm from &lt;STRONG&gt;AHO&lt;/STRONG&gt; to &lt;STRONG&gt;PSCAN&lt;/STRONG&gt;?&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;*Does anyone knows in which PAN-OS release it was changed? Is there any documentation at PA available about this change?&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;I will really appreciate it if someone could help me with those few open points.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;BR /&gt;Regards,&lt;BR /&gt;Arek&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 07 Jul 2021 13:28:22 GMT</pubDate>
    <dc:creator>A_Adamski</dc:creator>
    <dc:date>2021-07-07T13:28:22Z</dc:date>
    <item>
      <title>Query regarding the default state of FPGA on PA-3060: What's the output of the command "debug dataplane fpga state" running on PAN-OS 9.1.7 or above?</title>
      <link>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/417485#M93557</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Dear Community Members,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I hope someone will be able to help me out to confirm the default FPGA states on the PA-3060 appliance and supply some additional info on this matter?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;As per the knowledgebase article (&lt;A href="https://knowledgebase.paloaltonetworks.com/KCSArticleDetail?id=kA10g000000PLsRCAW" target="_self"&gt;CAN THE CONTENT INSPECTION PERFORM ONLY IN SOFTWARE OR HARDWARE ON PA-3000 SERIES FIREWALLS?)&amp;nbsp;&lt;/A&gt;I see that the used algorithms are:&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;STRONG&gt;AHO&lt;/STRONG&gt; - &lt;U&gt;Hardware (Offloaded)&lt;/U&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;STRONG&gt;DFA&lt;/STRONG&gt; - &lt;U&gt;Software&lt;/U&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;*&lt;STRONG&gt;PSCAN&lt;/STRONG&gt; - &lt;U&gt;Software&lt;/U&gt;, and it will be replacing AHO (but I could not find any info in regards to when it should happen)&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;Unfortunately, I do not have the needed hardware to execute the command and check it by myself. &lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;And I would like to verify what (on default on PA-3050/3060) the output of the command "&lt;STRONG&gt;debug dataplane fpga state&lt;/STRONG&gt;" running the PAN-OS 9.1.7 or above is?&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;I'm also interested to find some more info about the change of algorithm from &lt;STRONG&gt;AHO&lt;/STRONG&gt; to &lt;STRONG&gt;PSCAN&lt;/STRONG&gt;?&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;*Does anyone knows in which PAN-OS release it was changed? Is there any documentation at PA available about this change?&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P data-unlink="true"&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;I will really appreciate it if someone could help me with those few open points.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;BR /&gt;Regards,&lt;BR /&gt;Arek&lt;/P&gt;&lt;P data-unlink="true"&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Jul 2021 13:28:22 GMT</pubDate>
      <guid>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/417485#M93557</guid>
      <dc:creator>A_Adamski</dc:creator>
      <dc:date>2021-07-07T13:28:22Z</dc:date>
    </item>
    <item>
      <title>Re: Query regarding the default state of FPGA on PA-3060: What's the output of the command "debug dataplane fpga state" running on PAN-OS 9.</title>
      <link>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/459889#M102015</link>
      <description>&lt;P&gt;Was there ever any feedback on this Arek?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have been trying to debug a frequent high DP CPU issue and went from 8.1 to 9.1 based on PA support recommendations. Still have the high DP CPU issue and finally found that AHO is "software only", where as the documentation says it should be in the FPGA on PA-3000 series by default. I also don't have PSCAN listed anywhere. Was this a 9.x change that made AHO software only by default? Unfortunately I don't know what state it was in 8.1.&lt;/P&gt;</description>
      <pubDate>Thu, 20 Jan 2022 17:58:10 GMT</pubDate>
      <guid>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/459889#M102015</guid>
      <dc:creator>Adrian_Jensen</dc:creator>
      <dc:date>2022-01-20T17:58:10Z</dc:date>
    </item>
    <item>
      <title>Re: Query regarding the default state of FPGA on PA-3060: What's the output of the command "debug dataplane fpga state" running on PAN-OS 9.</title>
      <link>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/533423#M109879</link>
      <description>&lt;P&gt;I am also trying to debug high dataplane cpu on 3260, and both aho and dfa is set to software, when disabling software offload (enabling hardware offload) the high dataplane cpu is a problem of the past we have gone from 75+ to 9-10 %. When we disable sofware offload and reboot the firewall it reenables software offload after boot - so to questions comes to mind:&lt;/P&gt;
&lt;P&gt;a) Why has software offload been enabled in the first place (it seams to have been disabled in earlier versions)&lt;/P&gt;
&lt;P&gt;b) Is there a way to "save" the desired state ?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 07 Mar 2023 09:00:12 GMT</pubDate>
      <guid>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/533423#M109879</guid>
      <dc:creator>Jakob_Staerk</dc:creator>
      <dc:date>2023-03-07T09:00:12Z</dc:date>
    </item>
    <item>
      <title>Re: Query regarding the default state of FPGA on PA-3060: What's the output of the command "debug dataplane fpga state" running on PAN-OS 9.</title>
      <link>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/534807#M110039</link>
      <description>&lt;P&gt;&lt;A href="https://knowledgebase.paloaltonetworks.com/KCSArticleDetail?id=kA10g000000PLsRCAW" target="_self"&gt;https://knowledgebase.paloaltonetworks.com/KCSArticleDetail?id=kA10g000000PLsRCAW&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;According to this knowledebase article is done on purpurse from 9.1&lt;/P&gt;</description>
      <pubDate>Fri, 17 Mar 2023 05:13:49 GMT</pubDate>
      <guid>https://live.paloaltonetworks.com/t5/general-topics/query-regarding-the-default-state-of-fpga-on-pa-3060-what-s-the/m-p/534807#M110039</guid>
      <dc:creator>Jakob_Staerk</dc:creator>
      <dc:date>2023-03-17T05:13:49Z</dc:date>
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