PBR IN HARDWARE?

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L3 Networker

PBR IN HARDWARE?

Hello!

just a little question on PBR!

PA4020 support PBR in HARDWARE? Which Limitation For PBR?

thks,

ALLE

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L6 Presenter

Re: PBR IN HARDWARE?

By PBR, do you mean to say PBF = Policy Based Forwarding?

There's no specific limitation on PBF itself and the limitation is really system limitation such as capacity.  Thanks.

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L6 Presenter

Re: PBR IN HARDWARE?

Which means that PBF/PBR is never done by the system cpu not even on PA-200?

Compared to SSL-termination which is performed by the system cpu up to (including) PA-2xxx if im not misinformed, while PA-4xxx did this in the dataplane and PA-5xxx have an updated design to perform even more SSL-termination than the 4xxx series.

I think this question can have to do with that on Cisco its not uncommon that when one use PBR all packets will get punted to the system cpu instead of just using the asic (aka "dataplane") unless you use C6500 and upwards depending on supervisor etc.

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L6 Presenter

Re: PBR IN HARDWARE?

Hi...My response was directed at the question for the PA4020.  Thanks.

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L6 Presenter

Re: PBR IN HARDWARE?

So what about the other models?

Do there perhaps exist a feature matrix/table which explains what is done in dataplane vs whats done in mgmtplane for various models?

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L6 Presenter

Re: PBR IN HARDWARE?

The dataplane is used for processing of the production traffic, while the mgmt plane is for administrative purpose only.  PBF, SSL decryption, appID, content inspection, etc are done on the dataplane.  For simplification, most of the settings (syslog, SNMP, logging, reporting, etc) under the Device tab are handled by the mgmt plane.

Thanks.

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L6 Presenter

Re: PBR IN HARDWARE?

Im pretty sure the system cpu is involved regarding ssl decryption for PA-2xxx and lower models (perhaps not once the SSL is setup but during the "generate fake cert to send to the client" phase) thats why I asked regarding other features aswell.

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L6 Presenter

Re: PBR IN HARDWARE?

You're correct, the cpu is involved.  However, we have dedicated cpu/processors for the dataplane and dedicated cpu/processors for the mgmt plane.  They are separate and do not share their resource across the two planes.  As such, the ssl decryption would involve the dataplane's cpu/processors only.

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L3 Networker

Re: PBR IN HARDWARE?

hello,

exactly Mikand. I want to know if the PBF is Asic-based or CPU-based?

Because the CPU can have an signifactly impact on System performance.

But When I see the others responses I think that the CPU of DATAPLANE  is involved when I use PBF,

thks,

ALEX

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L6 Presenter

Re: PBR IN HARDWARE?

The "cpu" of dataplane is the asic/fpga (depending on model).

While the system cpu is what PA calls mgmtplane or controlplane.

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