Meaning of packet buffer, packet descriptor and packet descriptor (on-chip) on PA Firewall

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Meaning of packet buffer, packet descriptor and packet descriptor (on-chip) on PA Firewall

L3 Networker

Hi All,

 

Our Data Plane is going high. While checking we could see that the packet descriptor (on-chip) average and the packet buffer average had gone.

 

I just want to know what does packet buffer, packet descriptor and packet descriptor (on-chip) on PA Firewall means.

 

Thanks in advance

4 REPLIES 4

Cyber Elite
Cyber Elite

Hello,

To check data place CPU usage, check out the following article, but i usually just open a case:

https://knowledgebase.paloaltonetworks.com/KCSArticleDetail?id=kA10g000000ClRTCA0

 

Here you might find the definition answers?

https://docs.paloaltonetworks.com/pan-os/10-1/pan-os-admin/zone-protection-and-dos-protection/dos-pr...

 

L4 Transporter

HI @OtakarKlier 

 

so looking at the document you linked, does that mean that packet descriptor (on-chip) is referring to slow pathed traffic that is being buffered ?

PCCSA PCNSA PCNSE PCSAE

L0 Member

Hello Tamilivanan,

 

Please find the below info,

 

Packet Descriptors: This is a Data structure in the DRAM where the actual RAW packets are saved.

Packet Descriptors: This is a Data Structure within the DRAM where the WQE is stored 

Packet Descriptors on chip: This is a Data Structure within the SSO’s internal memory. It is used for Internal QoS queues, Inflight Queues and Desheduled Packet Queue.

 

Hope this info will help you.

Cyber Elite
Cyber Elite

Hello,

It should be both, slow and fast path. The data plane handles both.

Someone please correct me if incorrect.

 

Regards,

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